FII mainly uses Coremark and Dhrystone Benchmarks to evaluate the RISC-V3.01 CPU (Central Processing Units) performance on FII-PRX100-D(ARTIX-7, XC7A100T) XILINX FPGA Board (https://fpgamarketing.com/FII-PRX100-S-ARTIX-100T-XC7A100T-Xilinx-RISC-V-FPGA-Board-FII-PRX100-S-1.htm). Coremark has…
In computing, benchmarks are used to quantitatively measure the performance of the CPU. They are specially designed programs to run several iterations which includes specific…
1.Introduction Coremark has been EEMBC’s CPU evaluation standard since 2009. EEMBC (Embedded Microprocessor Benchmark Consortium) is a non-profit organization with members including Huawei, Intel, ARM and…
1. Introduction to Bus Direct to Table of Contents: RISC-V Syllabus In computing, a bus (originally from Latin word, omnibus) is a communication…
1.Introduction to Interrupt Direct to Table of Contents: RISC-V Syllabus Before diving into the project, a simple introduction of interrupt should be mentioned.…
Embedded Linux System Basics PetaLinux System Basics Ubuntu Basics – commands and usage Shell Commands and Operands Basic Shell Operations Common Shell Commands APT Download…
Reference materials： RISC-V Reader Chinese RISC-V User-Level ISA RISC-V Privileged Architecture RISC-V Address Map version 1.2 FII-PRX100-D schematics FII-PRX100-D(ARTIX 100T,XC7A100T) Hardware Reference Guide Introduction to…
1.Schematics Analysis Direct to Table of Contents: RISC-V Syllabus In this case, buttons are considered as inputs. When pressing the push buttons, the…
1.Schematics Analysis Direct to Table of Contents: RISC-V Syllabus Segment display will be used in the following projects, so an analysis of…
1.C Project Files Composition Direct to Table of Contents: RISC-V Syllabus Test_dbg.cfg It is mainly used to configure OpenOCD, and is not required…
1.Using Freedom Studio to Create a New C Project Direct to Table of Contents: RISC-V Syllabus Here, Freedom Studio is used as…
1.Introduction to FII-RISCV CPU Direct to Table of Contents: RISC-V Syllabus First of all, there is an overview of the CPU, FII-RISCV.…