FII mainly uses Coremark and Dhrystone as the benchmark test to evaluate the performance of RISC-V3.01 CPU (Central Processing Units, central processing unit) on FII-PRX100-S…
When evaluating hardware, benchmarks are often used to measure the performance of CPUs (Central Processing Units). They are specially designed programs that run a certain…
1.Introduction to Coremark Coremark has been EEMBC’s CPU judging standard since 2009. EEMBC (Embedded Microprocessor Benchmark Consortium, the Embedded Microprocessor Benchmark Consortium) is a…
1. fii_uart1.c Related reference articles: RISC-V teaching plan fii_uart1.c is mainly used to implement the declared UART1_IRQ_register function in fii_uart1.h #include <stdio.h> #include…
1. Introduction to UART Related reference articles: RISC-V teaching plan Before entering the RISC-V UART interrupt design, here is a brief introduction to the…
1. Engineering code Related reference articles: RISC-V teaching plan The interrupt caused by PWM is also an external interrupt, and its interrupt request…
1. Introduction to PWM Related reference articles: RISC-V teaching plan PWM (pulse-width modulation), pulse width modulation is a method of cutting the electrical…
