The RISC-V Instruction Set Manual
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Python Functions
What are functions? Why are they used? In python, functions are blocks of code that run when references. They are useful for reusing code rather…
Performance Evaluation of FII RISC-V3.01 on FII-PRX100-D (ARTIX-7, XC7A100T) XILINX FPGA Board
FII mainly uses Coremark and Dhrystone as the benchmark test to evaluate the performance of RISC-V3.01 CPU (Central Processing Units, central processing unit) on FII-PRX100-S…
FII RISC-V3.01 FII-PRX100-D (ARTIX-7, XC7A100T) XILINX FPGA Board Dhrystone Migration Guide
When evaluating hardware, benchmarks are often used to measure the performance of CPUs (Central Processing Units). They are specially designed programs that run a certain…
FII RISC-V3.01 FII-PRX100-D (ARTIX-7, XC7A100T) XILINX FPGA Board Coremark Migration Guide
1.Introduction to Coremark Coremark has been EEMBC’s CPU judging standard since 2009. EEMBC (Embedded Microprocessor Benchmark Consortium, the Embedded Microprocessor Benchmark Consortium) is a…
Ethernet module (IP core) RISCV interface package
When we have learned the relevant knowledge of Ethernet and the application of the Ethernet module IP core in the FPGA, we can encapsulate the…
7-segment digital tube IP CPU interface package
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I2C software engineering main function
1. fii_i2c0.c Related reference articles: RISC-V teaching plan fii_i2c0.c mainly implements some functions declared in fii_i2c0.h. #include <stdio.h> #include <stdint.h> #include “fii_i2c0.h” #include…
I2C0 module CPU implementation and project header file
1. I2C0 module design Related reference articles: RISC-V teaching plan The structure of the RISC-V I2C0 module is shown in Figure 1. Because…
I2C introduction and design
1. Introduction to I2C Related reference articles: RISC-V teaching plan PRX100-D develops the EEPROM chip of AT24C02 onboard, and the test of the…
UART software engineering main function
1. fii_uart1.c Related reference articles: RISC-V teaching plan fii_uart1.c is mainly used to implement the declared UART1_IRQ_register function in fii_uart1.h #include <stdio.h> #include…
UART1 CPU implementation and project header file
1. UART CPU implementation Related reference articles: RISC-V teaching plan The RISC-V UART1 module is the same as the physical layer of the general…
UART introduction and design
1. Introduction to UART Related reference articles: RISC-V teaching plan Before entering the RISC-V UART interrupt design, here is a brief introduction to the…
PWM engineering code and example waveform
1. Engineering code Related reference articles: RISC-V teaching plan The interrupt caused by PWM is also an external interrupt, and its interrupt request…
RISC-V PWM interrupt design and application (1) PWM introduction and design
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RISC-V GPIO Interrupt Project Design (2)
2. Engineering code Related reference articles: RISC-V teaching plan 2.3. fii_gpio.c #include <stdio.h> #include <stdint.h> #include “fii_gpio.h” #include “platform.h” //Function to implement GPIO…